PRELIMINARY TECHNICAL DISCLOSURE High Performance CMOS Low Power/Low Voltage Integrated Circuits

This report advances the need to develop creatively new design strategies for low voltage, low power, high performance, integrated circuits. Attention is focused on analog cells, which are particularly vulnerable to process vagaries and the accentuated performance sensitivities to critical modeling parameters spawned by low voltage operation. Device operation in triode and weak inversion regimes is proposed for specialized applications, as are new modeling initiatives and the need to implement adaptive hardware as a means of mitigating the deleterious effects of model, circuit, and layout uncertainties.